[BUG REPORT OPTIMISER]

or you use
LDI _ACCA, xx
STS Z, _ACCA
LDI _ACCA, yy
STD Z+11, _ACCA
LDI _ACCA, ...
STD Z+22, ...

which will use only 2 cycles for adding and storing instead of 3 for adding separately and storing ... it also will use smaller amount of ROM,
but the displacement is only +/-63 and the Z-Register is not changed ... the flags are not changed too

all depends on the number and size of displacements to add ... so you must decide what to do ...

@All

I sincerely thank you all for your input, I truly do, but the problem is not the one that you imagine.

The problem is that the optimiser interprets addresses wrongly, and therefore incorrectly optimises. Sadly, the solutions that you propose only mask the problem, not solve it. Now the problem is correctly solved, the original optimisation is almost as efficient your proposed solutions, and so it is not worth adding a new optimisation, especially as it only solves a very limited problem that would not be used in practice (a for loop would be used instead typically).

Thomas, do you need me to e-mail you with the fix? If so, please let me know your e-mail by pm.

Thank you all again.

@Rolf: Your last suggestion is exactly what the optimiser does. The problem is that a later optimisation removes what it sees as superfluous lines, which are mostly correct, but not quite all.