We've using several AY0438 32-Segment CMOS LCD Driver in cascade in our systems with custom coded routines to drive them.
Today we tried to use the AVRco 7 seg library and found that the library seems to handle only low to high clock transitions to load data as in the 74HC595 nonmux sample circuit, which is almost the same as the one we use except for the AY0438 instead of th 74HC595.
Since circuit didn't responded, we compare both circuits and found the 74HC595 load data during low to high transition and AY0438 does it during high to low.
One simple solution could be an inverter gate on the clk signal sent from the library, but i wonder if there is a hack to invert clk signal on the library software to avoid hardware patches?
Today we tried to use the AVRco 7 seg library and found that the library seems to handle only low to high clock transitions to load data as in the 74HC595 nonmux sample circuit, which is almost the same as the one we use except for the AY0438 instead of th 74HC595.
Since circuit didn't responded, we compare both circuits and found the 74HC595 load data during low to high transition and AY0438 does it during high to low.
One simple solution could be an inverter gate on the clk signal sent from the library, but i wonder if there is a hack to invert clk signal on the library software to avoid hardware patches?
